Static semiconductor memories are often referred to as SRAMs (Static Random Access Memories) because, unlike DRAMs, or Dynamic Random Access Memories, they do not require periodic refresh signals to restore their stored data.
A typical SRAM circuit is shown in FIG. 1. Operation of the circuit is well understood by those skilled in the art and will not be detailed here. Briefly, reference numerals 19 and 21 denote access transistors, while reference numerals 28 and 23 denote pull down transistors. Reference numerals 27 and 29 denote loads which, in this case, are thin film transistors. The drains of transistors 28 and 23 are connected to ground line 31. Bit lines are denoted by reference numerals 11 and 17, while word lines are denoted by reference numerals 26 and 25. (In many instances, a common, single-word line is employed.)
As memory cell sizes shrink and access speeds increase, the designer's task of providing a reliable cell has become increasingly more complicated.